changed: small optimization in ttmath_subindexed_x64()
(asm for x86_64 on MS VC) changed: removed some MS VC warnings changed: if TTMATH_DEBUG_LOG is defined then UInt::UInt() constructor fills the table with special values added: macro: TTMATH_BITS(min_bits) which returns the number of machine words capable to hold min_bits bits git-svn-id: svn://ttmath.org/publicrep/ttmath/trunk@201 e52654a7-88a9-db11-a3e9-0013d4bc506e
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01a86e40d9
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@ -1,4 +1,4 @@
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Version 0.9.0 prerelease (2009.09.13):
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Version 0.9.0 prerelease (2009.09.20):
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* fixed: Big::operator>>(std::istream&, Big<> &) didn't recognize values
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* fixed: Big::operator>>(std::istream&, Big<> &) didn't recognize values
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in scientific mode (with 'e' character)
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in scientific mode (with 'e' character)
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* added: support for wide characters (wchar_t, std::wstring)
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* added: support for wide characters (wchar_t, std::wstring)
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@ -25,6 +25,9 @@ Version 0.9.0 prerelease (2009.09.13):
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Big::SetInfoBit(unsigned char)
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Big::SetInfoBit(unsigned char)
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Big::IsInfoBit(unsigned char)
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Big::IsInfoBit(unsigned char)
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some methods for manipulating the info flags
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some methods for manipulating the info flags
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* added: macro: TTMATH_BITS(min_bits)
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which returns the number of machine words
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capable to hold min_bits bits
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* changed: Factorial() is using the Gamma() function now
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* changed: Factorial() is using the Gamma() function now
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* changed: Big::Div(ss2)
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* changed: Big::Div(ss2)
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Big::Mod(ss2)
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Big::Mod(ss2)
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@ -46,10 +46,13 @@
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*/
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*/
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#ifdef _MSC_VER
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#ifdef _MSC_VER
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//warning C4127: conditional expression is constant
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#pragma warning( disable: 4127 )
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#pragma warning( disable: 4127 )
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//warning C4127: conditional expression is constant
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#pragma warning( disable: 4702 )
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//warning C4702: unreachable code
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#endif
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#endif
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#include "ttmathbig.h"
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#include "ttmathbig.h"
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#include "ttmathobjects.h"
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#include "ttmathobjects.h"
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@ -2788,6 +2791,8 @@ namespace ttmath
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#ifdef _MSC_VER
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#ifdef _MSC_VER
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#pragma warning( default: 4127 )
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#pragma warning( default: 4127 )
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//warning C4127: conditional expression is constant
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//warning C4127: conditional expression is constant
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#pragma warning( disable: 4702 )
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//warning C4702: unreachable code
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#endif
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#endif
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#endif
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#endif
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@ -157,6 +157,13 @@ namespace ttmath
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*/
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*/
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#define TTMATH_BUILTIN_VARIABLES_SIZE 256u
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#define TTMATH_BUILTIN_VARIABLES_SIZE 256u
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/*!
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this macro returns the number of machine words
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capable to hold min_bits bits
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e.g. TTMATH_BITS(128) returns 4
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*/
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#define TTMATH_BITS(min_bits) ((min_bits-1)/32 + 1)
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#else
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#else
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/*!
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/*!
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@ -203,6 +210,13 @@ namespace ttmath
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*/
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*/
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#define TTMATH_BUILTIN_VARIABLES_SIZE 128ul
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#define TTMATH_BUILTIN_VARIABLES_SIZE 128ul
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/*!
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this macro returns the number of machine words
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capable to hold min_bits bits
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e.g. TTMATH_BITS(128) returns 2
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*/
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#define TTMATH_BITS(min_bits) ((min_bits-1)/64 + 1)
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#endif
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#endif
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}
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}
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@ -279,6 +293,7 @@ namespace ttmath
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namespace ttmath
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namespace ttmath
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{
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{
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@ -2594,6 +2594,18 @@ public:
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*/
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*/
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UInt()
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UInt()
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{
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{
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// when macro TTMATH_DEBUG_LOG is defined
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// we set special values to the table
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// in order to be everywhere the same value of the UInt object
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#ifdef TTMATH_DEBUG_LOG
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#ifdef TTMATH_PLATFORM32
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for(uint i=0 ; i<value_size ; ++i)
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table[i] = 0xc1c1c1c1;
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#else
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for(uint i=0 ; i<value_size ; ++i)
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table[i] = 0xc1c1c1c1c1c1c1c1;
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#endif
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#endif
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}
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}
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@ -390,7 +390,7 @@ namespace ttmath
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#endif
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#endif
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TTMATH_LOG("UInt::AddVector")
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// TTMATH_LOG("UInt::AddVector")
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return c;
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return c;
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}
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}
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@ -613,7 +613,7 @@ namespace ttmath
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#endif
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#endif
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TTMATH_LOG("UInt::SubVector")
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// TTMATH_LOG("UInt::SubVector")
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return c;
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return c;
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}
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}
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PUBLIC ttmath_adc_x64
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PUBLIC ttmath_adc_x64
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PUBLIC ttmath_addindexed_x64
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PUBLIC ttmath_addindexed_x64
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PUBLIC ttmath_addindexed2_x64
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PUBLIC ttmath_addindexed2_x64
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PUBLIC ttmath_addvector_x64
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PUBLIC ttmath_addvector_x64
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PUBLIC ttmath_sbb_x64
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PUBLIC ttmath_sbb_x64
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PUBLIC ttmath_subindexed_x64
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PUBLIC ttmath_subindexed_x64
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PUBLIC ttmath_subvector_x64
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PUBLIC ttmath_subvector_x64
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PUBLIC ttmath_rcl_x64
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PUBLIC ttmath_rcl_x64
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PUBLIC ttmath_rcr_x64
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PUBLIC ttmath_rcr_x64
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PUBLIC ttmath_div_x64
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PUBLIC ttmath_div_x64
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;
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; Microsoft x86_64 convention: http://msdn.microsoft.com/en-us/library/9b372w95.aspx
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;
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;
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; "rax, rcx, rdx, r8-r11 are volatile."
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; "rax, rcx, rdx, r8-r11 are volatile."
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; "rbx, rbp, rdi, rsi, r12-r15 are nonvolatile."
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; "rbx, rbp, rdi, rsi, r12-r15 are nonvolatile."
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mov r9, 1
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mov r9, 1
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dec rdx
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dec rdx
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jnz loop1
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jnz loop1
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jc return_1 ; most of the times, there will be NO carry (I hope)
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mov rax, 1
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ret
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done:
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done:
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xor rax, rax
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xor rax, rax
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ret
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ret
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return_1:
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mov rax, 1
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ret
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ttmath_subindexed_x64 ENDP
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ttmath_subindexed_x64 ENDP
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